Impact of intrinsic parameter fluctuations on the performance of In0.75Ga0.25As implant free MOSFETs

Abstract

We investigate the level of statistical variability in implant free (IF) MOSFETs, which are one of the most promising candidates III–V channels implementation. We report results for the threshold voltage (VT) fluctuations in aggressively scaled IF III–V MOSFETs induced by random discrete dopants in the δ-doping plane obtained using 3D drift–diffusion (D–D) device simulations. The D–D simulator is meticulously calibrated against results obtained from ensemble Monte Carlo device simulations. The simulated 30, 20 and 15 nm gate length In0.75Ga0.25As channel IF transistors exhibit threshold voltage standard deviations of 42, 58 and 61 mV, respectively, at a drain voltage of 0.1 V. At a drain voltage of 0.8 V, the threshold voltage standard deviations increase to 55, 71 and 81 mV, respectively. While the standard deviations of VT in the 30 and 20 nm IF MOSFETs are close to those observed in bulk Si MOSFETs with equivalent gate lengths, the threshold voltage standard deviation in the 15 nm gate length IF MOSFET is lower.