Nieto Lareo, Alejandro ManuelLópez Vilariño, DavidBrea Sánchez, Víctor Manuel2019-03-122019-03-122015Alejandro Nieto, David L. Vilariño and Victor M. Brea (2016) PRECISION: A reconfigurable SIMD/MIMD coprocessor for Computer Vision Systems-on-Chip. IEEE Transactions on Computers, 68 (8), 2548 - 2561. Doi: 10.1109/TC.2015.24935270018-9340http://hdl.handle.net/10347/18344Computer vision applications have a large disparity in operations, data representation and memory access patterns from the early vision stages to the final classification and recognition stages. A hardware system for computer vision has to provide high flexibility without compromising performance, exploiting massively spatial-parallel operations but also keeping a high throughput on data-dependent and complex program flows. Furthermore, the architecture must be modular, scalable and easy to adapt to the needs of different applications. Keeping this in mind, a hybrid SIMD/MIMD architecture for embedded computer vision is proposed. It consists of a coprocessor designed to provide fast and flexible computation of demanding image processing tasks of vision applications. A 32-bit 128-unit device was prototyped on a Virtex-6 FPGA which delivers a peak performance of 19.6 GOP/s and 7.2 W of power dissipationeng© 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other worksjournal article10.1109/TC.2015.2493527open access