Pereira Rial, ÓscarLópez Martínez, PaulaCarrillo, Juan M.Brea Sánchez, Víctor ManuelCabello Ferrer, Diego2021-03-042021-03-042019Pereira-Rial Ó, López P, Carrillo JM, Brea VM, Cabello D. Ultralow powervoltage reference circuit for implantable devices in standard CMOS technology. Int J Circ Theor Appl. 2019;47:991–1005. https://doi.org/10.1002/cta.2643http://hdl.handle.net/10347/24640This is the peer reviewed version of the following article: Óscar Pereira-Rial, Paula López, Juan M. Carrillo, Victor M. Brea and Diego Cabello (2019) Ultralow power voltage reference circuit for implantable devices in standard CMOS technology. International journal of circuit theory and applications, 47 (7), 991-1005, which has been published in final form at https://doi.org/10.1002/cta.2643. This article may be used for non-commercial purposes in accordance with Wiley Terms and Conditions for Use of Self-Archived VersionsAn ultralow power CMOS voltage reference for body implantable devices is presented in this paper. The circuit core consists of only regular threshold voltage PMOS transistors, thus leading to a very reduced output voltage dispersion, defined as σ/μ, and extremely low power consumption. A mathematical model of the generated reference voltage was obtained by solving circuit equations, and its numerical solution has been validated by extensive electrical simulations using a commercial circuit simulator. The proposed solution incorporates a passive RC low‐pass filter, to enhance power supply rejection (PSR) over a wide frequency range, and a speed‐up section, to accelerate the switching‐on of the circuit. The prototype was implemented in 0.18 μm standard CMOS technology and is able to operate with supply voltages ranging from 0.7 to 1.8 V providing a measured output voltage value of 584.2 mV at the target temperature of 36° C. The measured σ/μ dispersion of the reference voltage generated is 0.65% without the need of trimming. At the minimum supply of 0.7 V, the experimental power consumption is 64.5 pW, while the measured PSR is kept below –60 dB from DC up to the MHz frequency rangeeng© 2019 John Wiley & Sons, Ltd. This article may be used for non-commercial purposes in accordance with Wiley Terms and Conditions for Use of Self-Archived VersionsDesign methodologyPicowattSubthresholdTrim‐freeUltralow powerVoltage referencejournal article10.1002/cta.26431097-007Xopen access