RT Journal Article
T1 PRECISION: A Reconfigurable SIMD/MIMD Coprocessor for Computer Vision Systems-on-Chip
A1 Nieto Lareo, Alejandro Manuel
A1 López Vilariño, David
A1 Brea Sánchez, Víctor Manuel
AB Computer vision applications have a large disparity in operations, data representation and memory access patterns from the early vision stages to the final classification and recognition stages. A hardware system for computer vision has to provide high flexibility without compromising performance, exploiting massively spatial-parallel operations but also keeping a high throughput on data-dependent and complex program flows. Furthermore, the architecture must be modular, scalable and easy to adapt to the needs of different applications. Keeping this in mind, a hybrid SIMD/MIMD architecture for embedded computer vision is proposed. It consists of a coprocessor designed to provide fast and flexible computation of demanding image processing tasks of vision applications. A 32-bit 128-unit device was prototyped on a Virtex-6 FPGA which delivers a peak performance of 19.6 GOP/s and 7.2 W of power dissipation
PB IEEE
SN 0018-9340
YR 2015
FD 2015
LK http://hdl.handle.net/10347/18344
UL http://hdl.handle.net/10347/18344
LA eng
NO Alejandro Nieto, David L. Vilariño and Victor M. Brea (2016) PRECISION: A reconfigurable SIMD/MIMD coprocessor for Computer Vision Systems-on-Chip. IEEE Transactions on Computers, 68 (8), 2548 - 2561. Doi: 10.1109/TC.2015.2493527
NO This work is funded by the Ministry of Science and Innovation, Government of Spain (projects TIN2013-41129-P and TEC2012-38921-C02-02) and the Xunta de Galicia (contract GRC 2014/008)
DS Minerva
RD 25 abr 2026