RT Dissertation/Thesis
T1 Parallelization and Optimization of Iterative Solvers on High Performance Architectures
A1 Coronado Barrientos, Edoardo Emilio
K1 SpMV
K1 Iterative solvers
AB The main objective of this thesis is to develop an optimal sparse matrixstorage format and implement efficient computing kernels that accelerate the execution of the sparse matrix vector(SpMV) product on modern computer architectures. The SpMV product is an essential building brick for a myriad ofnumerical application codes, especially for iterative solvers and numerical simulators.Improving the performance of the SpMV product is of special interest for researchers, because it is the majorbottleneck for codes where it is required. Optimizing this product on modern computer architectures requiresknowledge of parallel programing paradigms, efficient parallel algorithms and a basic idea of the device architecturebeing targeted.
YR 2021
FD 2021
LK http://hdl.handle.net/10347/27230
UL http://hdl.handle.net/10347/27230
LA eng
DS Minerva
RD 3 may 2026