RT Journal Article
T1 A detailed coupled-mode-space non-equilibrium Green's function simulation study of source-to-drain tunnelling in gate-all-around Si nanowire metal oxide semiconductor field effect transistors
A1 Seoane Iglesias, Natalia
A1 Martínez, A.
K1 Electronic transport
K1 Electron density
K1 Electrical properties and parameters
K1 Field effect transistors
K1 Current-voltage characteristic
K1 Computer simulation
K1 Nanowires
K1 Leptons
K1 Electron tunneling
K1 Potential energy barrier
AB In this paper we present a 3D quantum transport simulation study of source-to-drain tunnelling in gate-all-around Si nanowire transistors by using the non-equilibrium Green's function approach. The impact of the channel length, device cross-section, and drain and gate applied biases on the source-to-drain tunnelling is examined in detail. The overall effect of tunnelling on the ID-VG characteristics is also investigated. Tunnelling in devices with channel lengths of 10 nm or less substantially enhances the off-current. This enhancement is more important at high drain biases and at larger cross-sections where the sub-threshold slope is substantially degraded. A less common effect is the increase in the on-current due to the tunnelling which contributes as much as 30% of the total on-current. This effect is almost independent of the cross-section, and it depends weakly on the studied channel lengths.
PB AIP Publishing
SN 1089-7550
YR 2013
FD 2013-09-12
LK https://hdl.handle.net/10347/38952
UL https://hdl.handle.net/10347/38952
LA eng
DS Minerva
RD 24 abr 2026